CS 256 Digital Design and Computer Architecture (Fall 2022)
Overview
This course covers the fundamentals of computer architecture from a bottom-up perspective, presenting the basic building blocks of processors, the concept of an instruction set architecture (ISA), and understanding how programs are compiled and executed. The course covers the practical discipline of digital systems design to enable students to design systems using the Verilog/SystemVerilog Hardware Description Language. Designs will be implemented on Field Programmable Gate Arrays (FPGAs) using modern industry-standard design tools. Students will also learn about how performance of digital systems generally, and processors specifically is evaluated and improved. By the end of this course, students will have a deep understanding of the hardware that underpins computing, enabling them to be more aware of the performance, efficiency, and capability of computing systems.
Administration
Instructor: Suhaib Fahmy
TAs: Olga Krestinskaya and Hao Liu
Time: Monday and Thursday at 13:00–14:30
All class communication is via CampusWire, so please sign up as soon as possible.
Resources, recordings, and assignment submission is via Blackboard.
Objectives
By the end of this course, students will be able to:
- Design digital systems of moderate complexity using Verilog/SystemVerilog and implement them on FPGAs
- Verify designs by devising a testing strategy and using Verilog/SystemVerilog testbenches
- Understand the architecture of Field Programmable Gate Arrays and apply the steps of the Digital Design Flow
- Understand the fundamental building blocks of general purpose processors and how they combine to execute programs
- Evaluate the performance of processors and digital circuits and apply pipelining to improve performance
Textbooks
The primary textbook is:
- Sarah L. Harris and David M. Harris, Digital Design and Computer Architecture, RISC-V Edition, Morgan Kaufmann, ISBN 978 0128200643
The secondary recommended book is:
- David A. Patterson and John L. Hennessey, Computer Organization and Design – RISC-V Edition, 2nd ed, 2021, Morgan Kaufmann, ISBN 978 0128203316
Grading
- 10% for two homework assignments
- 20% for midterm exam
- 40% for course project
- 30% for final exam
Schedule
| Week | Topics |
|---|---|
| 1 | The digital abstraction, CMOS logic, revision of Boolean algebra, combinational logic |
| 2 | Sequential Circuits, introduction to Hardware Description Languages |
| 3 | Combinational circuit design in Verilog/SystemVerilog, sequential circuit design in Verilog/SystemVerilog |
| 4 | The digital design flow, introduction to FPGA design tools |
| 5 | FPGA architecture, number representation and arithmetic, arithmetic in Verilog/SystemVerilog |
| 6 | Combinational and sequential circuit timing and pipelining |
| 7 | Testing and verification of digital systems |
| 8 | Finite state machines, Midterm test |
| 9 | Instruction set architecture, program flow in assembly |
| 10 | Pipelined processor datapath, parallelism with VLIW, superscalar, out of order execution |
| 11 | Memory hierarchy and cache |
| 12 | Interfacing peripherals, A2D/D2A, GPIO, PWM, I2C, SPI, high speed serial, FPGAs and processors |
| 13 | Class project demonstrations |
| 14 | Future directions in computer architecture: CGRAs, GPUS, accelerators, FPGAs in computing systems |
| 15 | Semester ends |