Suhaib Fahmy
- Associate Professor, Computer Science
Biography
Suhaib Fahmy is Associate Professor of Computer Science and the principal investigator of the KAUST Accelerated Connected Computing Laboratory (ACCL).
Professor Fahmy graduated from Imperial College London with an M.Eng. in Information Systems Engineering in 2003 and a Ph.D. in Electrical and Electronic Engineering in 2008. Following his Ph.D., he joined Trinity College Dublin, Ireland, as a postdoctoral research fellow and later worked as a visiting research engineer at Xilinx Research Labs Ireland, focusing on reconfigurable computing systems.
He was Assistant Professor of Computer Engineering at Nanyang Technological University, Singapore from 2009–2015, where his team led early efforts to virtualize FPGAs for cloud computing, as well as pioneering work on efficient mapping of designs to FPGA primitives.
In 2015, he returned to the UK, joining the University of Warwick Associate professor, Reader, the Professor of Computer Engineering. While at Warwick, he led the Connected Systems Research Group and the Adaptive Reconfigurable Computing Lab and launched the joint Computer Systems Engineering degree program. He was also appointed a Turing Fellow at The Alan Turing Institute, the UK’s national institute for data science and artificial intelligence.
He has received numerous awards, including the IEEE Conference on Field Programmable Technology (FPT) Best Paper Award in 2012, IBM Faculty Awards in 2013 and 2017, the International Conference on Field-Programmable Logic and Applications (FPL) Community Award in 2016 and 2024, the ACM Transactions on Design Automation of Electronic Systems Best Paper Award in 2019, and the IEEE High Performance Extreme Computing Conference Best Paper Award in 2021.
In 2023, he was awarded the KAUST Distinguished Teaching Award for his exceptional contributions to the classroom instruction mission of the University.
Research Interests
Professor Fahmy and his team at the ACCL are currently investigating a variety of approaches to hardware acceleration and how connected computing can enable more efficient, performant and secure systems.
His group focuses on overcoming the inherent latency and inefficiency of existing computing abstractions. To achieve this goal, they develop connected accelerator architectures that consider connectivity from the outset alongside specialized accelerator architectures to support more challenging applications.
